One or more aspects relate, in general, to processing within a computing environment, and in particular, to facilitating such processing.
Processing within computing environments is enhanced by using a memory hierarchy to store and retrieve data. Typically, a memory hierarchy includes main memory (also referred to as memory) and a cache hierarchy. The cache hierarchy includes multiple levels of data caches, such as, for instance, one or more private level caches (L1, L2) and at least one higher level shared cache (e.g., L3, L4).
Applications operating on large amounts of in-memory data typically waste much of their time waiting for data to be transferred from memory, through the cache hierarchy, to the L1 data cache before it can be processed. That is, when there is a request for data, an attempt is made to retrieve the data from the cache. If the data is not in the cache (i.e., a cache miss), it is retrieved from memory. To minimize this time, and to improve performance, prefetching of data from memory into the L1 cache is employed.
Aggressive prefetching can improve performance by avoiding cache miss penalties when an application eventually needs the data. The prefetcher brings data into the cache ahead of time so that no or less penalty is incurred upon actual data usage by the processor. On the other hand, prefetching too aggressively can cause increased bus utilization, which leads to performance degradation, in particular in multiprocessor, multi-chip and multi-node systems.